And here we’ve been complaining about Flat Pack No-Lead chips when this guy is prototyping with Ball Grid Array in a Wafer-Level Chip Scale Package (WLCSP). Haven’t heard that acronym before?

And we heartily endorse that. The chip is an ATtiny20 in a WLCSP (wafer-level chip-scale package) that’s a mere 1.5 mm by 1.4 mm. The underside of the chip has twelve tiny solder balls in a ...

Critical IC mineral concerns; wafer shipments shrink; Europe bets big on AI; new ultrasonic cleaner; high-speed DRAM test; ...

Focusses on Advanced IC-Substrates and Next Generation Wafer-Level Packaging ...

ASU is undertaking particularly innovative work to scale up wafer-level and panel-level ... to Natcast to oversee the packaging capabilities at the new CHIPS for America Prototyping and NAPMP ...

STATS ChipPAC is an outsourced semiconductor assembly and test provider based in Singapore. The company was started in 1994. It provides wafer bump, probe and assembly, advanced wafer bump technology, ...

YINCAE has introduced UF 120LA, a high-purity liquid epoxy underfill engineered for advanced electronics packaging. With ...

At 5pm yesterday, the equipment manufacturer of wafer level chip scale packaging sorting machines for the semiconductor industry saw its shares hit a new high to close 17 sen up at RM3.32.